Micro Interconnection System | Engineering Dissertations


In the past, the primary function of micro-systems packaging was to provide input/output (I/O) connections to and from integrated circuits (ICs) and to provide interconnection between the components on the system board level while physically supporting the electronic device and protecting the assembly from the environment.

In order to increase the functionality and the miniaturization of the current electronic devices, these IC devices have not only incorporated more transistors but have also included more active and passive components on an individual chip. This has resulted in the emerging trend of a new convergent system[1]

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Currently, there are three main approaches to achieving these convergent systems, namely the system-on-chip (SOC), system-in-package (SIP) and system on package (SOP). SOC seeks to integrate numerous system functions on one silicon chip. However, this approach has numerous fundamental and economical limitations which include high fabrication costs and integration limits on wireless communications, which due to inherent losses of silicon and size restriction.

SIP is a 3-D packaging approach, where vertical stacking of multi-chip modules is employed. Since all of the ICs in the stack are still limited to CMOS IC processing, the fundamental integration limitation of the SOC still remains. SOP on the other hand, seeks to achieve a highly integrated microminiaturized system on the package using silicon for transistor integration and package for RF, digital and optical integration[1] IC packaging is one of the key enabling technologies for microprocessor performance.

As performance increases, technical challenges increase in the areas of power delivery, heat removal, I/O density and thermo-mechanical reliability. These are the most difficult challenges for improving performance and increasing integration, along with decreasing manufacturing cost.

Chip-to-package interconnections in microsystems packages serve as electrical interconnections but often fail by mechanisms such as fatigue and creep. Furthermore, driven by the need for increase the system functionality and decrease the feature size, the International Technology Roadmap for Semi-conductors (ITRS) has predicted that integrated chip (IC) packages will have interconnections with I/O pitch of 90 nm by the year 2018 [2]. Lead-based solder materials have been used for interconnections in flip chip technology and the surface mount technology for many decades.

The traditional lead-based and lead-free solder bumps will not satisfy the thermal mechanical requirement of these fine pitches interconnects. These electronic packages, even under normal operating conditions, can reach a temperature as high as 150C. Due to differences in the coefficient of thermal expansion of the materials in an IC package, the packages will experience significant thermal strains due to the mismatch, which in turn will cause lead and lead-free solder interconnections to fail prematurely.

Aggarwal et al [3] had modeled the stress experienced by chip to package interconnect. In his work, he developed interconnects with a height of 15 to 50 micrometre on different substrate using classic beam theory. Figure 1 shows the schematic of his model and a summary of some of his results.

Although compliant intrerconect could reduces the stress experienced by the interconnect, it is still in sufficient. Chng et al. [4] performed a parametric study on the fatigue life of a solder column for a pitch of 100micrometre using a macro-micro approach. In her work, she developed models of a solder column/bump with a pad size of 50micrometre and heights of 50 micrometre to 200 micrometre. Table I shows a summary of some of her results.

Table 1.1: Fatigue life estimation of solder column

chip thickness (micrometre)





board CTE (ppm/K)





solder column height (micrometre)

Fatigue life estimation/cycle)





















It can be seen from Table 1.1 that the fatigue lives of all solder columns are extremely short. Apart from the 5ppm/K board where there is excellent CTE matching, the largest fatigue life of the solder column is only about 518 cycles. As expected, the fatigue life increases significantly when the board CTE decreases from 18ppm/K to 10ppm/K and as the height increases from 50micrometre to 200micrometre.This is mainly due to the large strain induced by the thermal mismatch as shown in Figure 1.2.

The maximum inelastic principal strain was about 0.16 which exceeds the maximum strain that the material can support. Although the fatigue life of the chip to package interconnection can be increases by increasing the interconnects height, it will not be able to meet the high frequency electrical requirements of the future IC where they need to be operating at a high frequencies of 10-20 GHz and a signal bandwidth of 20 Gbps,

By definition, nanocrystalline materials are materials that have grain size less than 100nm and these materials are not new since nanocrystalline materials have been observed in several naturally-occurring specimens including seashells, bone, and tooth enamel [5, 6]. However, the nanocrystalline materials have been attracting a lot of research interest due to its superior mechanical and electrical properties as compared to the coarse-grained counterpart.

For example, the nano-crystalline copper has about 6 times the strength of bulk copper [7]. Furthermore, the improvement in the mechanical properties due to the reduction in grain size has been well-documented. Increase in strength due to the reduction in grain-size is predicted by the Hall-Petch relationship which has also been confirmed numerically by Swygenhoven et al [8] and was first demonstrated experimentally by Weertman [9].

The implantation of nanocrystalline copper as interconnect materials seems to be feasible from the processing viewpoint too. Copper has been used as interconnects materials since 1989 whereas nano-copper has also been widely processed using electroplating and other severe plastic deformation techniques in the past few years. For instance, Lu et al. [10] have reported electroplating of nano-copper with grain size less than 100 nm and electrical conductivity comparable to microcrystalline copper. Furthermore, Aggarwal et al [11] have demonstrated the feasibility of using electrolytic plating processes to deposit nanocrystalline nickel as a back-end wafer compatible process. However, there are certain challenges regarding implantation of nanocrystalline copper as interconnects materials.

As discussed above, nanocrystalline copper have a high potential of being used as the next generation interconnect for electronic packaging. However, it is vital to understand their material properties, deformation mechanisms and microstructures stability. Although the increase in strength due to the Hall-Petch relationship which has also been confirmed numerically and experimentally by Weertman [9], the improvement in the fatigue properties is not well documented and no model has been established to predict/characterize these nano materials in interconnection application; conflicting results regarding the fatigue properties have also been reported. Kumar et al [12] reported that for nano-crystalline and ultra-fine crystalline Ni, although there is an increase in tensile stress range and the endurance limit, the crack growth rate also increases.

However, Bansal et al. [7] reported that with decreasing grain size, the tensile stress range increases but the crack growth rate decreases substantially at the same cyclic stress intensity range. Thus, nanostructured materials can potentially provide a solution for the reliability of low pitch interconnections. However, the fatigue resistance of nanostructured interconnections needs to be further investigated.

Since grain boundaries in polycrystalline material increases the total energy of the system as compare to perfect single crystal, it will resulted in a driving force to reduce the overall grain boundary area by increasing the average grain size. In the case of nanocrystalline materials which have a high volume fraction of grain boundaries, there is a huge driving force for grain to growth and this presented a presents a significant obstacle to the processing and use of nanocrystalline copper for interconnect applications.

Millet et al [13] have shown, though a series of systematic molecular dynamics simulations, grain growth in bulk nanocrystalline copper during annealing at constant temperature of 800K can be impeded with dopants segregated in the grain boundaries regions. However, it has been observed that stress can trigger grain growth in nanocrystalline materials [14] and there is no literature available on impeding stress assisted grain growth. There is an impending need to investigate the impediment to grain growth caused by the dopant during fatigue/stress assisted grain growth

Dissertation Objectives

The goal of present project is to develop a model for the fatigue resistance of nano-materials that have been shown to have superior fatigue resistance. Accordingly, the following research objectives are proposed.

  • Develops a model for predicting fatigue life of nanostructured chip-to-package copper interconnections
  • Develops a fundamental understanding on the fatigue behavior of nanocrystalline copper for interconnect application
  • Addresses the issue on the stability of nanocrystalline materials undergoing cyclic loading

Overview of the Thesis

The thesis is organized so that past research on nanocrystalline materials forms the basis of the understanding and new knowledge discovered in this research. Chapter 2 reviews much of the pertinent literature regarding nanocrystalline materials, including synthesis, deformation mechanisms, and grain growth.

Chapter 3 describes a detailed overview of the technical aspects of the molecular dynamics simulation method including inter-atomic potentials, time integration algorithms, the NVT NPT, and NEPT ensembles, as well as periodic boundary conditions and neighbor lists. Include in this chapter is the algorithms for creating nanocrystalline

materials used in this dissertations.. Chapter 4 describes the simulation procedure designed to investigate and develop the long crack growth analysis. The results of the long crack growth analysis will be presented at the end of Chapter 4. Chapter 5 presents the result and discussion on mechanical behavior of single and nanocrystalline copper subjected to monotonic and cyclic loading whereas Chapter 6 presents the result and discussion on the impediment to grain growth caused by the dopant during fatigue/stress assisted grain growth. Finally, conclusions and recommendations for future work are presented in Chapter 5.

Chapter 2

This chapter offers an expanded summary of the literature published with regards to the fabrication methods, characterization, and properties of nanocrystalline materials in addition to a description of existing interconnect technology.

2.1 Off-Chip Interconnect Technologies

Chip-to-package interconnections in microsystems packages serve as electrical interconnections but they will often failed by mechanisms such as fatigue and creep. Furthermore, driven by the need for increase the system functionality and decrease the feature size, the International Technology Roadmap for Semi-conductors (ITRS) has predicted that interconnections of integrated chip (IC) packages will have a I/O pitch of 90 nm by the year 2018 [2].

The International Technology Roadmap for Semiconductors (ITRS) roadmap is a roadmap that semiconductor industry closely follows closely and its projects the need for several technology generations. The package must be capable of meeting these projections in order for it to be successful. This section reviews some of the current interconnect technology.

Wire bonding [15] as shown in Figure 2.1, is generally considered as one of the most simple, cost-effective and flexible interconnect technology. The devices on the silicon die are (gold or aluminum) wire bonded to electrically connect from the chip to the wire bond pads on the periphery. However, the disadvantages of wire bonding are the slow rate, large pitch and long interconnect length and hence this will not be suitable for high I/O application.

Instead of wires in the wire bonding, tape automated bonding (TAB) is an interconnect technology using a prefabricated perforated polyimide film, with copper leads between chip and substrate. The advantage of this technology is the high throughput and the high lead count. However, it is limited by the high initial costs for tooling.

An alternative to peripheral interconnect technology is the area-array solution, as shown in Figure 2.3, that access the unused area by using the area under the chip. In area-array packaging, the chip has an array of solder bumps that are joined to a substrate. Under-fill is then fills the gap between the chip and substrate to enhance mechanical adhesion. This technology gives the highest packaging density methods and best electrical characteristics of all the avaiable interconnection technology. However, not only is its initial cost is high, it requires a very demanding technology to establish and operate.

With the need for higher I/O density, compliant interconnects have been developed to satisfy the mechanical requirements of high performance micron sized interconnects. The basic idea is to reduce shear stress experienced by the interconnects through increasing their height or decreasing of its shear modulus (i.e. increases in their compliant) and hence the name compliant interconnects. Some of recent research in compliant interconnects include Tessera’s Wide Area Vertical Expansion, Form Factor’s Wire on Wafer and Georgia Institute of Technology’s Helix interconnects [17-19] as shown in Figure 2.4.

Although compliant interconnects can solve the problem of mechanical reliability issue, they are done at the expense of the electrical performance. Since there is a need to reduce the packages parasitic through a decrease line delays, there is a need to minimize the electrical connection length in order to increase the system working frequency. Hence, compliant interconnect may not meet the high electrical frequency requirements of future devices.

Figure 2.4: (a) Wide Area Vertical Expansion, (b) Wire on Wafer and (c) G-Helix [17-19]

Lead and lead-free solders typically fail mechanical when scaled down to less than to a pitch of 100 mm. Compliant interconnections, on the other hand, do not meet the high frequency electrical requirements. The Microsystems Packaging Research Center at Georgia institute of Technology had demonstrated the feasibility of using re-workable nanostructure interconnections. Aggarwal et al [20] had show that nanostructured nickel interconnections, through a Flip Chip test vehicle, was able to improve the mechanical reliability while maintaining the shortest electrical connection length. However, the main disadvantages of this method was the significant signal loss at high frequency signal of nanocrystalline nickel [21].

As discussed above, nanostructure interconnects technology is the most promising interconnect technology to best meet the stringent mechanical and electrical requirement of next generation devices. However, there is a need of an alternate materials and a sensible choice of materials in this case would be nanocrystalline copper for its high strength material with superior electrical conductivity.

Hence, it would be beneficial to use nanocrystalline-copper as material for the nanostructure interconnects. Due to the tendency for the grain to grow, there is a need to stabilize the grain growth in nanocrystalline copper before using it could be considered as a potential candidate for nanostructure interconnect.

2.2 Nanocrystalline material

Nanocrystalline materials are polycrystalline materials with an average grain size of less than 100 nm [22]. Over the past decade , new nanocrystalline or nanostructured materials with key microstructural length scales on the order of a few tens of nanometers has been gaining a lot of interest in the material science research society.

This is mainly due to its unique and superior properties, as compared to their microcrystalline counterparts which includes increased strength [22] and wear resistance [23]. These unique properties are due to the large volume fraction of atoms at or near the grain boundaries. As a result, these materials have unique properties that are representative of both the grain boundary surface characteristics and the bulk.

Recent advances in synthesis and processing methodology for producing nanocrystalline materials such as inert gas condensation [24], mechanical milling [25, 26], electro-deposition [27], and severe plastic deformation [28] have made it possible to produce sufficient nanocrystalline materials for small scale application.

2.2.1 Synthesis

Inert gas condensation, the first method used to synthesis bulk nanocrystalline [29], consists of evaporating a metal inside a high-vacuum chamber and then backfilling the chamber with inert gas [30]. These evaporated metal atoms would then collide with the gas atoms, causing them to lose kinetic energy and condenses into powder of small nano-crystals. These powders are then compacted under high pressure and vacuum into nearly fully dense nanocrystalline solids.

The grain size distribution obtained from this method is usually very narrow. However, the major draws back of this method are its high porosity levels and imperfection bonding. Grain coarsening also occurs due to the high temperature during the compaction stage [31].

Mechanical milling consists of heavy cyclic deformation in powders until the final composition of the powders corresponds to a certain percentages of the respective initial constituents [25, 26]. A wide grain size distribution is obtained by this method. This technique is a popular method to prepare nanocrystalline materials because of its applicability to any material and simplicity. However, their main drawback includes contamination and grain coarsening during the consolidation stage.

Electro-deposition consists of using electrical current to reduce cations of a desired material from a electrolyte solution and coating a conductive object on the substrate. Electro-deposition has many advantages over processing techniques and this includes its applicability to a wide variety of materials, low initial capital investment requirements and porosity-free finished products without a need for consolidation processing [27]. Furthermore, Shen et al. [32] and Lu et al.[33] had recently show that the right electro-deposition condition can produce a highly twinned structure which leads to enhanced ductility. The main drawback of this method is it is the difficulty to achieve high purity.

Severe plastic deformation, such as high-pressure torsion, equal channel angular extrusion (ECAE), continuous confined shear straining and accumulative roll-bonding, uses extreme plastic straining to produce nanocrystalline materials by mechanisms such as grain fragmentation, dynamic recovery, and geometric re-crystallization [34]. It is the only technology that transformed conventional macro-grained metals directly into nanocrystalline materials without the need of potentially hazardous nano-sized powders. This is achieved by introducing very high shear deformations into the material under superimposed hydrostatic pressure. Two of the most commonly used methods are high-pressure torsion and ECAE [35]. In the study of the effect of ECAE on the microstructure of nanocrystalline copper, Dalla Torre et al [36] observed that the grains become more equi-axial and randomly orientation as the number of passes increases, as shown in Figure 2.5

Figure 2.5: Microstructure of ECAE copper subjected to (a) 1 passes (b) 2 passes (c) 4 passes (d) 8 passes (e) 12 passes and (f) 16 passes [36]

2.2.2 Mechanical Behavior of nanocrystalline materials

Due to the small grain size and high volume fraction of grain boundaries, nanocrystalline materials exhibit significantly different properties and behavior as compared to their microcrystalline counterpart. The structure and mechanical behavior of nanocrystalline materials has been the subject of a lot of researchers’ interests both experimentally [37-43] and theoretically [44-50]. This section reviews the principal mechanical properties and behavior of nanocrystalline materials. Strength and ductility

Recent studies of nanocrystalline metals have shown that there is a five to ten fold increases in the strength and hardness as compared to their microcrystalline state [7, 36, 37, 51, 52]. This increase in the strength is due to the presence of grain boundaries impeding the nucleation and movement of dislocations.

Since decreasing grain boundary size increases the number of barrier and the amount of applied stress necessary to move a dislocation across a grain boundary, this resulted in a much higher yield strength. The inverse relationship between grain size and strength is characterized by the Hall-Petch relationship [53, 54] as shown in equation (2.1).

Eq (2.1)

In equation (2.1), s is the mechanical strength, k is a material constant and d is the average grain size. Hence, nanocrystalline materials are expected to exhibit higher strength as compared to their microcrystalline counterpart. Figure 2.6 and Figure 2.7 show the summary of hardness and yield strength from tensile test that are reported in the literature. Indeed, hardness and yield strength of copper with a grain size of 10nm (3GPa) can be one order higher than their microcrystalline counterpart. To the larger specimens.

Derivation from Hall-Petch relationship begins as the grain size approaches 30nm where the stresses needed to activate the dislocation multiplication via Frank-Read sources within the grains are too high and the plastic deformation is instead accommodated by grain boundaries sliding and migration.[12]. Furthermore, as the grain size reduces, the volume fraction of the grain boundaries and the triple points increases.

Material properties will be more representative of the grain boundary activity [64] and this will resulting the strength to be inversely proportional to grain size instead of square roots of the grain size as predicted by Hall Petch relation [65]. Further reduction in the grain size will result in grain boundaries processes controlling the plastic deformation and reverse Hall-Petch effect, where the materials soften, will take place.

Although sample defects had been account for the earlier experimental observation of reverse Hall-Petch effect[24], Swygenhoven et al [66] and Schiotz et al [47], using molecular simulation, was able to showed that nanocrystalline copper had the highest strength (about 2.3GPa ) at a grain size of 8nm and 10-15nm respectively. Conrad et al [67] pointed out that below this critical grain size, the mechanisms shifted to grain boundary-mediated from dislocation-mediated plasticity and this causes the material to become dependent on strain rate, temperature, Taylor orientation factor and presence of the type of dislocation.

The yield stress of nanocrystalline copper was highly sensitive to strain rate even though it is a fcc materials. The strain rate sensitivity, m, in equation 2.2 a engineering parameter which measured the dependency of the strain rate and Figure 2.8 shows a summary of m as a function of grain size for copper specimen in the literature [51, 68-70]. Due to high localized dislocation activities at the grain boundaries which results in enhanced strain rate sensitivities in nanocrystalline materials, m increases drastically when the grain size is below 0.1 mm as shown in Figure 2.8.


Room temperature strain rate sensitivity was found to dependent on dislocation activities and grain boundaries diffusion [52, 71, 72]. Due to the negligible lattice diffusion at room temperature, the rate limiting process for microcrystalline copper was the gliding dislocation to cutting through forest dislocation, resulting in low strain rate sensitivities.

However, due to the increasing presence of obstacles such as grain boundaries for nanocrystalline materials, the rate limiting process for smaller grain size was the interaction of dislocation and the grain boundaries, which is strain rate and temperature dependence. By considering the length scale of the dislocation and grain boundaries interaction, Cheng et al [52] proposed the following model for strain rate sensitivities

. (2.3)

z is the distance swept by the dislocation during activation, r is the dislocation density and a, a and b are the proportional factors. With this model, they will be able to predict higher strain rate sensitivities for nanocrystalline material produced by severe plastic deformation as compared to other technique. Since the twin boundaries in nanocrystalline or ultra fine grain copper served as a barriers for dislocation motion and nucleation which led to highly localized dislocations near the twin boundaries, the strain rate sensitivity of copper with high density of coherent twin boundaries was found to be higher than those without any twin boundaries [33]. Lastly, the increase enhanced strain rate sensitivity in nanocrystalline copper had been credited for it increases in strength and ductility. For example, Valiev et al [60] credited the enhanced strain rate sensitivity of 0.16 for the high ductility.

In addition to a strong dependency on the strain rate, strength in nanocrystalline materials was also highly dependent on the temperature. Wang et al [73] observed that the yield strength for ultra fine grain copper with a grain size of 300nm increases from approximately 370MPa to 500MPa when the temperature reduces from room temperature to 77k. The authors attributed this increase in yield strength due to the absence of additional thermal deformation processes at 77k. This is consistent with Huang et al [74] observation where the temperature dependence of nanocrystalline copper with an increase in hardness of nanocrystalline copper with lowering the temperature is noted

Ductility is another important characteristic of nanocrystalline materials. In microcrystalline materials, a reduction in grain size will increase the ductility due to the presence of grain boundaries acting as effective barriers to the propagation of micro-cracks[75]. However, nanocrystalline copper showed a lower strain to failure than that of their microcrystalline counterparts and this lacks in ductility was attributed to the presence of processing defects [76].

Recent advanced in processing of nanocrystalline materials offer materials with fairly good ductility in additional to ultra-high strength. Lu et al [10] reported that nanocrystalline copper with minimal flaw produced via electro-deposition had an elongation to fracture of 30%. Furthermore, Youssef et al [77] observed a 15.5% elongation to failure for defect free nanocrystalline copper produced via mechanical milling. Hence, it was possible for nanocrystalline copper to be both strong and ductile if the processing artifacts are minimized.

The failure are usually consists of dimples several time larger than their grain size was normally found on the failure morphology of nanocrystalline materials and Kumar et al [78] presented the following model for initiation and hence the eventual failure of nanocrystalline materials. Furthermore, the presence of shear region was found to be due to shear localization since the ratio of strain hardening rate to prevailing stress was usually small [79, 80].

Figure 2.9: Schematic illustration of fracture in nanocrystalline material postulated by Kumar et al [78] Creeps

Nanocrystalline materials are expected to creep during room temperature. This is because Due to the higher fraction of grain boundaries and triple junctions, self diffusivity of nanocrystalline material had been shown to increase by an order of three as compared to microcrystalline copper [81]. Since creep behavior was dependent on grain size and diffusivity, with creep rate increases with an increase in diffusivity or a decrease in grain size, the creep temperature for nanocrystalline copper was known to be a small fraction of melting temperature (about 0.22 of its melting points). Furthermore, since creep had always been cited as one of the reason for grain size softening in nanocrystalline materials, creeps were other important mechanical properties of nanocrystalline materials that had been gaining a lot of researcher’s attention.

Due to the high volume fraction of grain boundaries and enhanced diffusivity rate, diffusion creep is considered to be predominant. In general, the steady state creep rate of microcrystalline materials at high temperature was described by Bird-Dorn Mukherjee equation [82]


where is the strain rate, A is a dimensionless constant, G is the shear modulus, b is the magnitude of Burgers vector, k is Boltzmann’s constant, R the gas constant, T is the absolute temperature and p is the inverse grain size exponent. The stress exponent n will correlate with the creep mechanism (for example, a value 4-5 for will represent dislocation climb). Two of the more established creep models that showed linear dependence on stress were the Nabarro-Herring models and the Coble creep models.

In Nabarro-Herring model, the creep rate is inversely proportional to the square of the average grain the case of coble creep model where grain boundaries sliding was the main mechanisms, the creep rate depends on the cube of its average grain size as shown in equation 2.5 and 2.6 respectively.


where DL is the lattice diffusion coefficient


where Dgb is the grain boundary diffusion coefficient, W is the activation volume and d is the grain boundaries thickness,

As discussed above, nanocrystalline copper at room temperature were expected to creep due to its small grain size and enhanced diffusivity rate. However, the experimental results had been contradicting. Using equation 2.6 and parameters from Cai et al [83], the Coble creep rate should be in the order of 1×10-6/s for a effective stress of 25MPa and a temperature of 373K. Sanders et al [84] observed that the creep rates for nanocrystalline copper, over a range of temperature and stress, was two to four orders lower than that predicted by Coble creep model.

Neiman et al [85] reported the same trend for nanocrystalline copper produced by inert gas condensation at room temperature. Since low angle grain boundaries can resist grain boundaries sliding and inhibited vacancy diffusion, they concluded that the lower creep rate can be due to the presence of low angle grain boundaries. Lastly, the twin boundaries and the small grain size that act as inhibition to dislocation activities was cited as the other two main reasons for the lower creep rate.

Bansal et al [7] showed that the creep rates of nanocrystalline copper produced by ECAE was in the order of 1×10-9/s. This was a few orders higher than grain boundaries diffusion predicted by Nabarro-Herring model but it was still three to four orders lower than that predicted by Coble creep model. Furthermore, in that study, she concluded that the creeps were associated to the grain boundaries diffusion since the activation energy was very similar to that of the grain boundaries diffusion activation energy. Furthermore, the existence of a threshold stress below which the steady state creep rate was negligible showed that the grain boundaries do not act as perfect sources and sinks.

On another extreme, Cai et al [83] showed the creep rate for electrodeposited nanocrystalline copper, at a temperature from 0.22 to 0.24 of the melting temperature, was found to be the similar to that predicted by Coble creep model even though nanocrystalline copper produced by this methods had significant number of low angel grain boundaries. Furthermore, no grain growth had been detected for these temperatures. Similar observation was made by Grabovetskaya et al [86] using nanostructured copper produced by severe plastic deformation with a grain size from 100 to 300nm Figure 2.10 shows the summary of the experimental data from the literature on creep rates of nanocrystalline copper.

One of the reasons for the discrepancy in the creep rate could be that none of the mechanisms were the dominant mechanisms. Valiev et al [87] showed that the grain boundary sliding contributions about 15-20% of the overall deformation of nanocrystalline copper with the rest by intra-granular slip. Since different grain size was found to have different dominant mechanism and due to the widely different grain size distribution of nanocrystalline copper, it was then suggested that the creep rate could be a composite of all the mechanism. Lastly, another source of discrepancy on the computation of creep rate and activation energy was the lack of experimental data on the actual grain boundaries thickness and its diffusion coefficient.

Yamakov et al. [88] using fully 3D molecular simulation showed that, under high tensile stresses, nanocrystalline palladium exhibit steady-state diffusion creep that could be described by the Coble-creep model. Furthermore, they found that when the grain boundaries width was comparable with grain diameter, the creep’s mechanism changed from that of Nabarro-Herring creep to that of the Coble creep. Furthermore, the first observation of Lifshitz sliding, an accommodation mechanism for the Coble-creep, had also been observed in that study. Haslam et al. [89] using molecular simulation showed that at the onset of grain growth, Coble creep was showed to be the mechanism for deformation. Furthermore, the enhanced creep rate, arise from topological changes during the initial growth phases, was reported to enhance both the stress-induced grain boundary diffusion fluxes and grain boundary sliding. Fatigue

It had long been known that grain refinement improved the fatigue and fracture resistance of metals. For microcrystalline materials, reducing the grain size increases the fatigue endurance limited, due to the increases in strength. [90, 91], but it would decreases the fatigue damage tolerance due to the increases in crack path due to the increases in grain boundaries [92]. However, the fatigue and fracture resistance of nanocrystalline materials was not well understood as there were only limited studies conducted on the fatigue of nanocrystalline material.

It was important to study the effects of grain refinement on the fatigue behavior of nanocrystalline materials. Witney et al [93] conducted one of the earliest fatigue studies with 97.4-99.3% dense nanocrystalline materials. After they had subjected their nanocrystalline copper with a maximum stress amplitudes of 50% to 80% of the yield stress and a minimum of 10MPa, stress assisted grain growth, where the grain had growth to as much as 34% of its original grain size, had also been observed after a few hundred thousand cycles. The cyclic deformation was reported to be elastic.

Furthermore, they had also observed parallel micrometer size extrusion on the surface of the specimen. Similar observation was reported by the work of Bansal et al [7] with ECAE nanocrystalline copper. In that study, she had showed that the average grain grew from 45 nm to 56nm for 1% total strain range and to 72nm for 1.5% total strain range. Similarly, she had also reported the formation persistence slip band in the form of extrusions/ intrusions.

Hanlon et al [90], using electrodeposited nanocrystalline nickel (with average grain size of 20 to 40nm), showed that nanocrystalline nickel not only had a higher endurance limited as compared to their microcrystalline counterpart, it had also showed a significantly higher fatigue resistance. However, subsequent study conducted by the same authors showed significantly lower fatigue crack growth resistance for a wide range of load ratios [91]. Figure 2.11 shows the summary of stress intensive factors required for a growth rate of 10-6mm/cycle in ultra fine grain nickels as a function of the maximum stress intensity factor Kmax

Figure 2.11: Summary of stress intensive factors required for growth rate of 10-6 mm/cycle in ultra fine grain and nanocrystalline nickels as a function of the maximum stress intensity factor Kmax [91]

Due to the lack of literature data on fatigue life of nanocrystalline materials, ultrafine grain materials had also been studied to understand the mechanisms of grain refinement and grain growth but even these result were also very scatter. Agnews et al [94] had observed the cyclic softening for ultrafine grain copper, produced by severe plastic deformation, whereas Vinogradov et al [95] did not observed any cyclic softening in their 200nm ultra fine grain copper which was also produced by severe plastic deformation. Furthermore, Hashimoto et al [96] observed grain hardening in equiaxial microstructure but grain softening in elongated grains.

Furthermore, even if though the same cyclic softening were observed, the post processing were result in different conclusion. Since the hardness of the cycled ultra fine grain copper did not scaled with the inverse of the grain size, Agnews et al [94] suggested that the cyclic softening was caused by the decrease in the overall defect density and the changes in the mis-orientation.

However, noting a smaller magnitude of cyclic softening and grain coarsening of a -50C test to that obtained from a room temperature test, Hoppel et al [97] deduced that dynamic cyclic recrystallization process was responsible for the cyclic softening after comparing the microstructure. Hence, in order to address the reduce crack growth resistance of ultrafine grain, They [97] showed that recovery heat treatment of ultrafine-grained (UFG) copper would lead to an enhanced fatigue life.

Mughrabi et al. [98] observed that a much improved high cycle fatigue life for ultrafine-grained copper produced by severe plastic deformation but low cycle fatigue life was shown to be worse than coarse-grained copper.

In other to have a better understanding of fatigue behavior of nanocrystalline material, molecular simulations had also been employed to modeled fatigue behavior of nanocrystalline copper. Using a model with 960 atoms, Chang et al [99, 100] conducted an investigation on the influence of temperature and vacancy on the fatigue properties of nanoscale copper undergoing tension-compression loading.

Due to a higher allowable strain at higher temperature, the fatigue stresses increases with temperature. Figure 2.12 shows a summary of their results. Furthermore, they had observed that the failure transits from a brittle failure at high stresses to a ductile failure as the number of cycle to failure increases. Figure 2.13 shows that the fatigue endurance limited increases as volume fraction of vacancies decreases.

In order to investigate the fatigue crack mechanism in nanoscale copper, Farkas et al [101] using molecular dynamics to simulate the crack propagation in nanocrystalline nickel with a grain size of 10nm. In that study, they had showed the that fatigue crack growth mechanism of nanoscale copper involved the emission of dislocation from the crack tips and the formation of the nano-voids ahead of the main crack. Although emission of Shockley partials from the grain boundaries and triple points, due to the high stress concentration, were observed, emission of full dislocation was not observed. Furthermore, Farkas et al [102] showed in a parallel study that the predicted crack growth rates was dependence on the stress intensity amplitude. Lastly, their results appeared to be consistent with experimental results as shown in Figure 2.14 Deformation mechanisms

Experimental and computational results had shown that the strength of nanocrystalline materials alloys increases with decreasing grain size. However, the actual mechanisms responsible for the observed behavior of nanocrystalline materials were still not well established at least until recently. Computational simulations and electron microscopy had been performed to understand the deformation mechanisms.

Dislocation activities were quoted as the primary deformation mode for materials up to certain critical grain size, with the critical grain size depended on the stacking fault energy. Below this critical grain size, grain boundary sliding, grain rotation and Coble creep have been postulated to operate with dislocation activities. In this section, recent studies aimed at uncovering the deformation mechanisms will be presented. TEM studies on deformation mechanisms

Kumar et al [78] used ex situ TEM technique to observed deformation of nanocrystalline nickel with a average grain size of 30nm. In that study, dislocation-mediated plasticity was found to be the dominant mechanism in the deformation of nanocrystalline nickel with nucleation of voids at grain boundaries and triple junctions being caused by the dislocation emission at grain boundaries. Furthermore, intra-granular slip and grain boundary sliding was responsible for the nucleation of voids. However, the density of the dislocation observed could not account for the high level of imposed plastic strain as shown in Figure 2.15.

Hugo et al. [104] had the same observation on the lack of debris with their magnetron sputtered nickel thin film. This lack of debris could be explained by molecular simulation studies on aluminum by Derlet et al [105]: after a partial dislocation was emitted from one side of the grain, it will travel across the grain and then absorbed at the other side of the grain. Furthermore, dislocation might relax and being absorbed by the other grain after the stress had been removed.

The presence of deformation twins and stacking fault after in deformed nanocrystalline copper also suggested that the presence of the partial dislocation mediated processes as one of the deformation mechanisms in nanocrystalline materials [106]. This was confirmed by the work of Wu et al [107] where they observed the partial-dislocation mediated processes during uniaxial tension when the tests are carried out at liquid nitrogen temperature and high flow stresses. Furthermore, Youngdahl et al [108] observed dislocation pile up at the grain boundaries for nanocrystalline copper of up to 30nm grain size and Wu et al [107] in the study of tensile deformation of nanocrystalline nickel at room temperature, was able to imaged a full dislocation in 20nm nanocrystalline nickel. Hence, this showed that dislocation activities were still active at that grain size.

Furthermore, by showing dislocation storage during liquid nitrogen temperature but not at room temperature, they had showed that the propagation and de-pinning of dislocation were thermal activated and this was consistent with the result from molecular simulation [109]. However, Ke et al [110] had observed grain rotation of up to 15 in the study on the 10nm grain size gold. This is consistent with Shan et al [111] observation where reported grain rotation during straining in 10nm nanocrystalline nickel. Hence, grain boundaries sliding and grain rotation was identified as another deformation mechanism for nanocrystalline materials.

However, the experimental observations on the deformation of nanocrystalline materials were contradicting. While Ke et al [110] had observed only grain rotation of up to 15 and no dislocation activities during the deformation of nanocrystalline gold with a grain size of 10nm using in-situ TEM even though they could detect clear evidence of dislocation was observed for 110nm silver using exactly the same methods. Stress relaxation test on 30nm nanocrystalline nickel conducted by Wang et al [112] over a range of deformation temperature (77-373K) on the other hand showed that boundaries diffusion process such as Coble creep and grain boundaries sliding are not the dominant deformation mechanisms. Instead they found that the deformation kinetics was all dominated by dislocation processes. Molecular simulation

In addition to the results using TEM, large scale molecular dynamics had also provided insight to the deformation mechanisms in nanocrystalline materials. Room temperature 3D simulation of 30nm nanocrystalline copper and nickel had demonstrated that the nanocrystalline materials accommodated the external applied stress through grain boundaries sliding and emission of partial dislocation [105, 113, 114].

Furthermore, the interaction of these two mechanisms would induce the formation of shear plane where grains with small misorientation will coalescence to form a larger grain. Van Swygenhoven et al [115] had identified the ratio of unstable stacking fault to the stacking fault energy as a criterion for the nucleation of full dislocation: if this ratio was closer to unity, it will be easier full dislocation to be nucleated. Hence, only partial dislocation will be nucleated in nanocrystalline copper as their ratio were found to be about 7.81.

Molecular simulation had also showed that atomic shuffling in conjunction with emission of partial dislocation, involving short-range atomic motion, as another mechanism to trigger the grain boundaries and dislocation plasticity. Atomic shuffling not only caused a local change in the grain boundaries structure , it will cause a redistribution of the peak stress [105]. Derlet et al [105] showed that the effective stacking fault energy reduced up to 50% through structural relaxation after the emission of partial dislocation from the grain boundaries.

Molecular simulation conducted at a much higher temperature had identified Coble creep mechanism with grain boundaries sliding as accommodation mechanism known as Litshitz sliding[88]. However, extrapolation of Coble creep mechanisms to room temperature may not be justifiable as there was no reason to assume that the same rate limiting processes to be dominant at both high temperature and room temperature. Theoretical model

With the insight on the deformation mechanism of nanocrystalline materials gained from both the TEM and molecular simulation, constitutive models which could accurately predict the mechanisms were becoming available. The first known constitutive models was developed by Zhu et al. [116] using crystal plasticity theory and assuming that the grain interiors to be deformed by the emission of perfect or partial dislocation and grain boundaries sliding.

Since experimental and simulation results identified emission of partial and full dislocation and grain boundaries sliding as the three main deformation mechanism in nanocrystalline materials, they had developed a physic based model on which took into account of f these mechanism. To account for slip rate caused by the emission of partial dislocation, the following laws was applied.

if >0 (2.7)


In equation 2.7, is the pre-exponential constant, is the stacking fault energy per unit area and is the equilibrium spacing. Furthermore, in order to account for slip rate caused by the emission of full dislocation, following laws proposed by Asaro et al was used


Lastly, for grain boundary sliding, following law proposed by Conrad et al had been used:-


2.2.3 Grain growth

Since grain boundaries in polycrystalline material will increase the total energy of the system, there will be a driving force to eliminate grain boundaries and hence increasing the average grain size. This is especially true in the case of nanocrystalline materials and this presents a significant obstacle to the processing and use of nanocrystalline materials for engineering applications. In order to overcome this obstacle, it is important to understand the underlying mechanisms of grain growth in nanocrystalline materials.

However, accurate grain growth studies in nanocrystalline materials are difficult due to the difficulty in accurately determining the grain size. Nevertheless, some studies had been conducted by measuring the grain size through direct electron microscopic techniques or estimated from the X-ray diffraction peak broadening values size had been conducted even though X-ray diffraction may underestimate the grain size and the small thickness required for TEM may enhanced the grain growth rate..

One of the main mechanism for grain growth in micro-crystalline materials is curvature-driven grain boundary migration in which the motion of the grain boundaries move towards the center of their curvature [117]. This curvature in the grain boundaries, in the order of the inverse of the grain size, arises from the angular equilibrium requirement of triple junctions which is known as the Herring relation [118]. Due to the high volume fraction of the triple points in nanocrystalline materials, they are especially unstable against grain growth.

This causes grain growth to occur even at a relatively low temperature. Simulation work by Haslam el al. [119] had identified grain rotation and coalescence as another mechanism for grain growth in nanocrystalline materials. Grain rotation and coalescence is the elimination of the grain boundaries between two grains through grain rotation, leaving behind two highly curved grain boundaries which then further promote rapid grain growth by grain boundaries migration

Considering the non conservative dislocation motion due to unbalance forces at grain boundaries due to the triple points and using Read-Shockley model for the dependent of grain boundaries energy during mis-orientation at low angel and sub-grain boundaries, Li [120] formulated the rate of grain rotation in term of evolution of inter-dislocation spacing via non conservative dislocation motion. However, this mechanism of grain coarsening is only possible in nanocrystalline materials due to the need for rotational mobility. Furthermore, recent studies [14, 121, 122] had shown that this mechanism for grain growth could be accelerates considerably by externally-applied stress.

Pantleon et al [129] revealed that electrodeposited nanocrystalline copper have greater thermal stability for thinner films where there is a higher fraction of low angle grain boundaries. Recent molecular dynamics simulations by Spearot et al. [130] verified that low angle grain boundaries had lower energy configurations and hence they are generally more stable. However, it is also important to note that several high-angle boundaries, such as the M3 (111) symmetric tilt interface, may have very low energies as well,

Another factor affecting the stability of the grain was identified to be the activation energy of grain boundaries diffusion. Thermal stability studies conducted by Bansal et al [131], on ECAE nanocrystalline copper and nickel, had shown that nickel was stable at 250C whereas considerable grain growth was observed in copper even at temperatures of 100C. In that study, the activation energy for grain growth of copper and nickel were calculated to be 33 kJ/mol and 55 kJ/mol respectively.

This computed activation energy for copper was much lower than the activation energy of 80-100 kJ/mol for grain growth for ECAE microcrystalline copper [132, 133]. Noting that copper’s grain boundaries diffusion and lattice diffusion activation energy of 100 kJ/mol and 49 kJ/mol[134] she had deduce that the underlying mechanism for grain growth in nanocrystalline copper was dominated by the grain boundaries diffusion. Similar observation of the lower activation energy for grain growth in nanocrystalline materials and attributing it to the lower activation energy of diffusion of atoms along the grain boundary had been made by Natter et al [135].

The processing route had been identified as another factors that will affect the grain growth in nanocystalline materials. In the thermal stability studies on ECAE copper conducted by Molodova et al. [136], the grain growth rate and their activation energy had been found to be a function of both the grain size and number of passes during ECAE. They had observed that grain growth will occur at lower temperatures for materials with smaller grain size and higher number of ECAE passes.

Furthermore, Gertsman et al. [124] had also showed that the density of the nanocrystalline copper will have some detrimental effect on the grain growth of nanocrystalline Cu at room temperature. In their thermal stability studies on ECAE copper, they had observed that grain growth will occur more readily for less dense samples as shown in Figure 2.18. This is because the pores in the samples increase self-diffusion in the grains and hence creating greater instability by acting as paths for surface diffusion [137]. Stress driven grain growth.

Recent observations on indentation creep experiment in high purity nanocrystalline copper conducted by Zhang et al [14, 138] pointed out the possibility of stress induced grain coarsening in nanocrystalline copper. This is because grain growth was observed even though Zhang et al [14, 138] performed these indentations at cryogenic temperatures where thermal and diffusion effects were suppressed. Further confirmation of stress assisted grain growth was provided by the work of Zhu et al [139]. By taking into the account of the effects of the grain growth, they could accurately predict the rapid decrease in hardness during dwells time observed in Zhang et al [14, 138] experiment.

In addition, Bansal et al [131] observed that a threshold stress was required for grains to grow at a given temperature in the creep experiments conducted using ECAE nanocrystalline copper. Furthermore, stress assisted grain growth has also been observed in nanocrystalline materials during fatigue loading. Bansal et al [131] observed grain growth in nanocrystalline copper during low cycle fatigue tests with a load ratio of -1. The average grain size increased from 45 nm to 58.5 nm and 72.0 nm at strains of 1.0% and 1.5%, respectively, indicating stress driven grain growth.

Since understanding the phenomenon of stress induced grain growth is very important for the application of nanocrystalline materials on engineering application, there is a need to understand the mechanisms for stress induced grain coarsening. Using molecular dynamics simulations, Schoitz [122] was able to simulated stress assisted grain growth of nanocrystalline copper under cyclic loading.

In that study, he had identified grain rotation and coalescence as the mechanisms for stress assisted grain growth during severe plastic deformation. Furthermore, Zhang et al [14] concluded that grain rotation and coalescence were the primary grain growth mechanism given the large number of low angle grain boundaries in the vicinity of indentations. Gai et al [140] had arrived at the same conclusion when they had observed that the increased number of small angel grain boundaries as the dwell times had increased.

More grain growth studies using molecular dynamics conducted by Haslam et al [121] on nanocrystalline palladium under the influence of stress at 1200K . In that study, they had observed grain growth under the influence of stress due to increased diffusion of atoms at the grain boundary. The underlying mechanism for grain growth for the observed stress induced grain growth was then identified to be mainly due to curvature driven grain boundary migration and grain rotation-induced grain coalescence. Multi-scale simulations of nanoindentation conducted at a temperature of 0 K arrived at the same conclusion that grain growth mechanisms in nanocrystalline materials are primarily due to the migration of unstable grain boundaries and grain rotation and coalescence [141].

It is suggested that stress induced grain growth facilitated by grain boundary migration required the presence of extrinsic grain boundary dislocations [26] and the emission of free dislocations from the interface [32]. Hence, nanocrystalline materials with high energy non-equilibrium grain boundaries were more susceptible to stress assisted grain growth.

Recent studies by Lu et al. [33] provided the experiment verification of this argument. By comparing the final microstrain and grain size from both electrodeposited and cold-rolled nanocrystalline copper, observed that grain growth occurred at the same temperature at which the internal microstrain was relieved. This result confirmed the relationship between internal microstrain and grain growth.

However, a full understanding of grain boundaries migration and grain rotation will required more in-depth studies and no model had been established to describe the phenomenon of stress induced grain growth. However, for simple geometry such as a tilt boundaries, Gutkin et al [142] have developed a mode l to describe stress driven grain boundaries migration as a special mode of rotational plastic deformation by taking the account of declination of uncompensated ground boundaries junction.


In equation (2.10), critical shear stress for boundary motion, w is the tilt angle, b is the length of the declination dipole and d is separation of the dipole. Furthermore, equation 2.10 showed that the critical shear stress of the range of only 20-300MPa will be enough to cause the migration of the grain boundaries of grain between 10nm to 30nm in size and with a misorientation angle of 5 to 30. Ovid’ko et al then extended this model (equation 2.11) to take into the account of formation of immobile declinations, whose strength gradually increases as a result of grain boundaries sliding and diffusion.

(2.11) Grain growth retardation

A number of factors, for example solute drag and chemical drag, can be used to influence grain boundaries mobility and hence grain growth [143 ]. Since the grain boundary migration rate, V, depends on the driving force, P, and intrinsic mobility, it is possible to reduce grain growth through reducing the driving force, decreases grain boundaries diffusion [144].

= (2.12)

In equation 2.4, a is the lattice constant, Dgb is the grain boundaries diffusion, k is the Boltzmann’s constant and T is the absolute temperature. Equation 2.4 showed that the grain growth can be inhibited by reducing the driving force or decreasing the grain boundaries diffusion. The presence of dopant at the grain boundaries, which will create a solute drag’s effect, is one of the ways to reduces grain growth through reducing driving force of the grain boundaries mobility. This is one of the reasons for observing limited grain growth in several nanocrystalline solid alloy solution when the solute atom had segregated at the grain boundaries [123, 145].

Furthermore, the presence of dopants atoms at the grain boundaries will pin the free dislocation at the grain boundaries and reduces stress induced grain growth. Li et al [120], through theoretical calculation, indicated that metastable or high energy grain boundary structure and high purity material were the two main conditions required for stress induced grain growth.

Figure 2.19 showed that the number of free dislocations in the homogenous grain boundaries reduces the shear stress required for their emission. In Figure 2.19, x is the distance of free dislocation from center of grain boundary and h is the spacing between dislocations. Hence, pining the free dislocation using dopant will reduce stress induced grain growth.

Nanocrystalline materials were more susceptible to grain growth as compared to their micro-crystalline counterparts due to the higher volume fraction of high energy grain boundaries atoms. Hence, by introducing solute segregation at the grain boundaries [35], it may be possible to eliminate thermodynamics driving force for grain growth by reducing the excess grain boundaries energy to zero [34]

? = ?o – XB ?Hseg (2.13)

In equation 2.13, ?o is the specific grain boundaries energy of the sample, XB is the dopant concentration at the interfacial. ?Hseg is the enthalpy of segregation and this is the excess energy for introducing a foreign atom in the materials. Equation 2.13 showed that it was possible to decreased the grain boundaries energy ? by introducing a large ?Hseg. By doing so, the total Gibbs free energy would be smaller than the Gibbs free energy of the single crystal solid solution and this will eliminate the driving force for grain growth.

However, this is only true if the dopants segregate to the grain boundary and do not form precipitates. Although there is still no convincing experimental evidence to support this yet, some promising observations with doped samples of Pd1-x Zrx [145] and Y1-xFex [123] had showed that by increasing x, grain growth was suppressed until higher temperatures.

Furthermore, recent molecular dynamics simulations by Millett et al. [13, 146, 147] had shown that the driving force can be driven to zero with the presence of sufficient dopant atom content in the grain boundaries, and hence eliminating grain growth. Furthermore, Millett et al [13, 146, 147] had found that the concentration of dopants needed to prevent grain growth depended on the relative size of dopant atoms

2.2.4 Electrical properties

Due to the increased volume fraction of the grain boundaries in nanocrystalline materials, their electrical resistivity was found to be higher than that of their microcrystalline counterparts. This was due to increased grain boundary scattering activities. Figure 2.20 [27, 59] showed that at the constant temperature, the electrical resistivity increased with a decrease in grain size whereas the electrical resistivity increases as increases in temperature at a given grain size.

Since these observations are consistent with the theoretical analysis of grain boundaries scattering of electrons [6], they provided strong experimental evidence for this phenomenon. Lastly,, Bakonyi et al had shown that the electrical resistance is also a function of imperfection and residual stress introduced by synthesis process


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